Combination of thin-filmed electrical devices



Feb. 20, 1968 R. ZULEEG 3,370,184

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3,370,184 COMBINATION OF THlN-FILMED ELECTRICAL DEVICES Rainer Zuleeg,Huntington Beach, Calif., assignor to Hughes Aircraft Company, CulverCity, Calif., a corporation of Delaware Continuation of application Ser.No. 333,127, Dec. 24, 1963. This application Dec. 14, 1966, Ser. No.633,638 7 Claims. (Cl. 307303) This is a continuation of S.N. 333,127filed December 24, 1963, by the same inventor and assigned to theinstant assignee which has become abandoned.

This invention relates to novel high frequency solidstate electronicdevices of both active and passive types and to methods for fabricatingsuch devices. More particularly, the invention relates to solid-stateactive devices such as rectifiers and amplifiers and to solid-statepassive devices such as transmission lines and the like. As used hereinthe term active device means any solid-state electronic device which canalter one or more characteristics of an electrical signal appliedthereto in a controllable and reproducible fashion while the termpassive device means any solid-state electronic device or apparatuswhich does not controllably alter the characteristics of an electricalsignal applied thereto or transmitted thereby.

The fabrication of such devices, both active and passive, by means ofand in the form of thin-films is known. A thin-film transistor isdescribed in my co-pending application, S.N. 258,081 filed February 12,1963 and assigned to the instant assignee, as well as in an article byP. K. Weimer entitled The TFTA New Thin-Film Transistor published in theJune 1962 Proceedings of the I.R.E. commencing on page 1462. Because ofboth the techniques for forming such devices and because of theirextremely small dimensions, the fabrication of complete solid-statecircuits, including passive as well as active functions, has become ofincreasing importance and has given rise to a whole new art calledvariously, solid circuitry, micro-circuitry, integrated circuitry, ormicroelectronics. Such circuitry is possible because of the ability toform by vapor-deposition, masking and solid-state diffusion techniquesthin films capable of controllably providing such functions asrectification, amplification, resistance, capacitance, and inductance,in a single integrated structure. Thus amplification can be provided byvapordepositing a thin film metallic electrode, which may be called asource, upon a substrate and then depositing a thin-film of asemi-insulator material upon the source electrode film. A drain orcollector electrode is then formed by depositing a thin metallic film onthe semiinsulator film. Likewise by masking and vapor-depositiontechniques an additional metallic gate or control electrode in the formof a grid, for example, may be disposed in the semi-insulator filmbetween the source and drain electrode films. Thus the flow of majoritycharge carriers from the source to the drain electrodes through thesemiinsulator may be controlled by the field therein established by asignal on the gate electrode. Such devices are closely analogous tovacuum tube devices except that in these thin-film devices the chargecarriers flow from cathode to anode in a solid medium generally called asemiinsulator.

It will be appreciated that the disposition of active and passivecomponents into a single integrated circuit requires some means forsecuring the necessary electrical inter-connections. While in manyapplications such interconnections may be achieved by merely utilizing aconductive metal strip or film as in printed circuit applications, itwill be appreciated that high-frequency applications, especially above50 megacycles, require low impedance, low coupling connections andtransmission lines, else States Patent signal loss and degradationbecome unacceptably severe. In more conventional circuitry of large sizesuch connections and transmission lines may be provided by coaxialconductors or the like. However such conventional techniques are almostimpossible for use in thin-film circuits because of the extremely smalldimensions thereof. The present invention relates therefore, in oneaspect thereof, to a novel thin-film high frequency coupling network ortransmission line.

The kind of high frequency transmission line to which the presentinvention appertains is a fiat strip microwave transmission lineidentified by the registered trademark Tri-Plate by the owner andmanufacturer thereof, Sanders Associates, Inc. of Nashua, New Hampshire.This type of transmission line is fully described in a publication bySanders Associates, Inc. entitled Handbook of Tri-Plate MicrowaveComponents (1956). The transmission line consists essentially of a flatcenter conductor embedded in a dielectric material which is sandwichedbetween flat ground-plates 0r planes. The dielectric materials suggestedand/or used are Teflon (polytetrafluoroethylene) with glass orquartz-filled laminates or mixtures; polystyrene; or alloys of dimethylsilicone and styrene copolymer resin. The ground plates are generallyprovided by copper foil adhesively bonded to the plastic dielectricunder pressure. The aforementioned handbook notes that bonds obtained byspraying or plating the metal onto the dielectric are normally weak.

It will thus be appreciated that while the foregoing fiat stripmicrowave transmission line is an exceptionally useful device, theapplicability thereof to microelectronic integrated circuitry leavessomething to be desired. Thus, with the aforementioned materials theformation of a transmission line by vapor-deposition techniques does notappear to be particularly feasible and would tend to defeat theattainment of complete integration. Furthermore, since the degree ofpurity and freedom from contamination required for semiconductor devicesis so severe, the use of such materials as copper and plastics forconnections in integrated circuits including such devices would poseserious problems in the fabrication and operation thereof.

It is, therefore, an object of the present invention to provide improvedthin-film electrical apparatus.

Another object of the invention is to provide an improved high frequencytransmission line.

Another object of the invention is to provide improved thin-filmelectrical apparatus for use in microelectronic integrated circuitry.

Yet another object of the invention is to provide an improved highfrequency transmission line for microelectronic integrated circuitrywhich can be fabricated as an integral part of such circuitry.

These and other objects and advantages of the invention are attained byproviding a center strip conductor of a semi-insulator material andelectrically isolating the center strip from the surrounding material bymeans of either a rectifying barrier or by an electrically insulatingmaterial. To complete the transmission line, the surroundingsemi-insulator material is sandwiched between a pair of conductiveground plates or planes. The center strip may itself comprisesemi-insulator material of a first conductivity type embedded insemi-insulator material of a different conductivity type. As a typicalexample, a center conductor or core of N-type silicon may be embedded ina body of a P-type silicon so as to be co-extensive therewith.Alternatively, the center strip may be formed of a conductive materialwhich is electrically insulated from the surrounding semi-insulatormaterial. The electrically conductive ground plates or planes may beprovided by degenerately-doped semi-insulator material or byvapordeposited layers of aluminum, for example, on opposed surfaces ofthe semi-insulator body. In a typical embodiment a layer of metal may bevapor-deposited on a silicon substrate and alloyed therewith to form asthe first groundplane a degeneratively-doped silicon regrowth region. A-thin-film of P-type silicon may then be epitaxially deposited over andalong the degeneratively-doped regrowth region and then oxidized to forma surface coating of SiO for example. By photo-masking and etch resisttechniques a center strip may be formed through the oxide mask tothereby expose a strip of the P-type silicon therebeneath which extendsalong the length of the silicon film. Surface and near-surface portionsof the exposed silicon strip may be then converted by a diffusionoperation to N-type conductivity, after which the oxide may be removedand a further thin-film of P-type silicon epitaxially deposited uponboth the exposed P-type silicon surface and the N-type silicon strip. Inthis manner a thin-film of P-type silicon having a center core of N-typesilicon embedded therein and extending along the length thereof may befabricated. The upper and second ground-plane may then be formed byvapor-depositing a layer of aluminum, for example, over the surface ofthe second epitaxially deposited P-type silicon.

The invention will be described in greater detail by reference to thedrawings in which:

FIGURE 1 is a perspective view partly in section of a thin-filmtransmission line according to the invention;

FIGURES 2(a) through 2(d) are perspective views partly in section of thethin-film transmission line shown in FIGURE 1 and illustrating variousstages in the fabrication thereof;

FIGURE 3 is a partially schematic and elevational view in sectionshowing the transmission line of FIGURE 1 in combination with amicro-electronic integral circuit;

FIGURE 4 is a perspective view partly in section of another embodimentof a thin-film transmission line ac cording to the invention;

FIGURES 5(a) and 5 (b) are perspective views partly in section of athin-film active device according to the invention;

FIGURE 6 is an elevational view partly schematic and partly in sectionof an active thin-film device according to the present invention; and

FIGURE 7 is a graph showing pertinent electrical characteristics of theactive device shown in FIGURE 6.

\eferring now to FIGURE 1 a high frequency thin-film transmission line 1is shown comprising a pair of outer ground planes or plates 2 and 4, acenter conductor member 6, and a strip of semi-insulator material 8 inwhich the center conductor 6 is embedded. The ground plates 2 and 4 maybe of any good electrically conductive material such as aluminum orgold, for example. For reasons which will be demonstrated hereinafter,where metals are used for the ground plates 2 and 4, it is desirable toutilize metals which may be conveniently formed and applied byevaporation and deposition techniques, although other methods may beused for this purpose. Thus, it is also possible to form and apply theground plates by spraying or brushing solutions or the like in which themetal may be dispersed. It is also feasible to apply the metal to thesemi-insulator body 8 in the form of thin foils or films and tosubsequently bond or fuse, as by heating the foil to the semi-insulatorbody.

In connection with transmission lines according to the presentinvention, the term semi-insulator refers to and means any materialwhich at room temperature has a low intrinsic majority carrierconcentration so that at room temperature the material exhibits lowelectrical conductivity. In general, any material which exhibits anenergy phide; also satisfactory are compounds of the elements from theSecond Column with elements from the Sixth Column of the Periodic Tableof the Elements such as: zinc sulfide, zinc selenide, zinc telluride,cadmium sulfide, and cadmium selenide, cadmium telluride, and mercurysulfide. Silicon carbide is also a suitable semi-insulator material forthe purposes of the present invention. While any of the aforementionedmaterials may be used to advantage in the practice of the invention,description herein will be confined primarily to the use of cadmiumsulfide or silicon as exemplary materials.

According to the embodiment of the invention shown in FIGURE 1 thesemi-insulator body 8 may be of cadmium sulfide, for example, and thecenter conductor member 6 may be of the same material as the groundplanes 2 and 4 (i.e., gold). When an uninsulated metallic centerconductor is employed, it should not be of a metal which injects chargecarriers into the semi-insulator material.

Thus, for example, in the present case where the semiinsulator materialis cadmium sulfide, the center con ductor may be gold since this metal,being of a higher work function than is cadmium sulfide, will not injectcharge carriers thereinto, there being, in effect, a barrier between thecenter conductor 6 and the semi-insulator 8.,

The device may be formed by vapor depositing gold through a suitablemask on to a non-conductive substrate 7 which may be of glass, forexample, so as to form a narrow strip 4 of gold on the surface of thesubstrate 7 to.

again performed so as to deposit an additional layer 8" of cadmiumsulfide over the exposed surface of the first cadmium sulfide layer 8and over the center conductor 6. By this operation the center conductor6 is thus embedded in a strip of semi-insulator material formed by thecadmium sulfide layers 8 and 8', which now form an integral.

layer. The final step is to vapor-deposit the second ground plane member2 which may be accompanied by vapor depositing gold through a suitablemask onto the top surface of the cadmium sulfide layer 8'.

In FIGURES 2(a) through 2(d) a similar type of thin film transmissionline is shown in which the semi-insulator material is of silicon.Because of the great difiiculty in vapor-depositing silicon uponsurfaces other than silicon itself, the fabrication of a thin-filmtransmission line utilizing silicon follows a somewhat differentprocedure from the fabrication of the device shown in FIGURE 1 whereincadmium sulfide was utilized as the semiinsulator material. Thus, onecannot without great difficulty vapordeposit silicon semi-insulator,material upon the first metallic ground plane 4 as was done withcadmium sulfide in fabricating the device of FIGURE 1. Since, however,silicon may be conveniently deposited upon silicon, it is feasible toform at least the lower or first ground plane 4 1 electrical components.Alternatively, the silicon substrate may be either lightly-doped orintrinsic so as to present an effective electrically insulating surfacewith the first ground plane formed therein by heavily-dopingpredetermined surface and near-surface portions as by alloying ordiffusion techniques. By such heavy doping these surface andnear-surface portions can be converted to degenerative semi-insulatingmaterial which means that these portions have such a concentration ofimpurity therein as to cause them to lose their semi-insulatorcharacteristics and to behave as more conventional electricalconductors. If the semi-insulator material 8 be of P-type conductivity,the ground plane 4 may be formed by diffusing into the surface andnear-surface portions of the silicon substrate a P-type impurity such asaluminum. If the semi-insulator material be of N-type conductivity theground plane may be formed by likewise diffusing an N-type impurity suchas arsenic into the silicon substrate. The kind of degenerate dopingemployed is primarily determined by the conductivity type of thesemi-insulator forming the transmission line and not by the conductivitytype of the substrate, although it may be desirable to maintain a commonconductivity type for the semi-insulator, the first ground plane, andthe substrate.

For convenience and solely for purposes of illustration, thesemi-insulator body 8 in this embodiment may be referred to as being ofN-type conductivity due to an excess of majority charge carriers (i.e.,electrons) therein and the center conductor 6 may be referred to asbeing of P- type conductivity due to a deficiency of majority chargecarriers (i.e., electrons) therein. It will be understood that suchconductivity conditions are usually established by the incorporation ofcertain impurity elements into the bulk semi-insulator material. Thussilicon, for example, may have any one of such impurity elements asarsenic, antimony, or phosphorus incorporated therein to establishN-type conductivity since these elements contribute an excess ofelectrons to the silicon for current conduction. P-type silicon may haveany one of such impurity elements as aluminum, boron or galliumincorporated therein to establish P-type conductivity .since theseelements lack an excess of electrons for current conduction. The processof incorporating such impurity elements into the crystal latticestructure of semiconductor materials is well known and is commonlyreferred to as doping and may be achieved by diffusion or alloying.

According to the aspect of the invention shown in FIG- URES 2(a) through2(d), the center conductor member 6 may be of semi-insulator materialand, as has been mentioned previously, of the same material as thesemi-insulator body 8 although of different conducivity type. Thus, ifas described the semi-insulator body 3 is of P- type conductivity, thecenter conductor member 6 may be of N-type conductivity. The centerconductor member 6 is also heavily doped so as to exhibit highconductivity (low resistivity). That is, the center conductor member 6is of semi-insulator material which is so heavily doped as to bedegenerate which means that its conductivity is akin to that of metalssuch as copper and aluminum.

Still referring to FIGURES 2(a) through 2(d), the fabrication of a highfrequency transmission line according to the invention may be achievedby forming a first ground-plane or conductor 4 by diffusing adonor-conductivity type determining through a suitable mask upon asubstrate 7 of lightly-doped N-type silicon, for example. The mask maybe formed by oxidizing the surface of the silicon substrate and thenremoving a strip of the oxide corresponding to the dimensions andpattern of the transmission line to be formed as by photo-resist andetching techniques. A very heavy diffusion is achieved so as to form adegenerative strip of N-type silicon material. It is also possible thatthis ground-plane 4 might be in the form of a strip of thin foil ofantimony-doped gold, for example, which is alloyed to the supportingsubstrate so as to form a heavily-doped N-type silicon regrowth region.

A layer 8 of N-type silicon may then be expitaxially deposited through amask upon the ground-plane 4. In this process the silicon may be formedby the epitaxial process and caused to deposit upon the ground-plane bythe simultaneous reduction in hydrogen of phosphorous trichloride andsilicon tetrachloride at a temperature of from l2001300 C. This processis well known and fully described by H. C. Theuerer in the Journal ofthe Electrochemical Society (196lvol. 108 at page 649) and i by A. Markin the same journal (l961vol. 108 at page 880).

After the silicon layer 8, which may be about 1-l0p thick, for example,is formed, a non-conductive mask or covering 10 is formed on the upperor exposed major surface thereof as by oxidizing this surface to form alayer of silicon oxide (SiO thereon. After a suitable oxide mask, about1-2 thick, for example, has been formed, a center strip of oxidecorresponding to the desired width of the centerstrip conductor to beformed, is removed by photo-resist and etching techniques which are wellknown to the art. Thus the oxide layer 10 may be coated with aphoto-resist material portions of which are exposed, as by a mask, to alight pattern corresponding to the strip to be removed. The photo-resistis then developed whereby the unexposed portions are formed into anetch-resistant coating while the exposed center-strip is removed bychemical dissolution, as is well known in this process, to expose acenter-strip of oxide. The exposed oxide is then removed as by etchingthe same with hydrofluoric acid to expose a center-strip of the originalN-type silicon. Thereafter the remaining etch-resistant photo-resistcoating may be removed altogether.

The assembly is then exposed to an atmosphere containing the vapors of aP-type conductivitytype-determining impurity, such as boron, forexample, which impurity, by the process of diffusion into the exposedN-type silicon surface through the center-strip opening in the oxidemask 10, converts a strip 6 of surface and near-surface portions of theexposed silicon to P-type conductivity. These oxide masking diffusiontechniques are well known in the art and reference is made to US. PatentNos. 2,802,760 to Derick and Frosch and 3,025,589 to Hoerni for acomplete, detailed description thereof.

After the diffusion step has been completed the remaining oxide film 10is removed altogether as by etching the same with hydrofluoric acid toprovide the assembly shown in FIGURE 2(a). The next step is to form afurther layer 8 of N-type silicon, by the epitaxial deposition processdescribed previously, over the original N-type silicon layer 8 and theP-type center-strip 6, just formed as described. By this step the deviceshown in FIGURE 2(d) is provided comprising a center-strip 6 of P-typesilicon disposed or embedded in a thin layer of N-type silicon. Tocomplete the fabrication of the high frequency transmission line thesecond ground-plane 2 may be formed by converting the surface andnear-surface portions of the epitaxial N-type silicon layer 8' intoheavily or degeneratively-doped silicon as by diffusing or alloying anN-type impurity therein such as arsenic as described previously. It willbe understood that while the epitaxially deposited silicon layers 8 and8' are referred to herein as separate layers, they are in factindistinguishable in the final product since the last epitaxiallydeposited silicon layer 8 coalesces with and forms an unbroken extensionof the original silicon layer 8.

The characteristic impedance (Z of such a transmission line as set forthon page 8 of the aforementioned handbook is given by the expression:

ohms

In FIGURE 3 the application of the high frequency transmission line 22according to the invention for con-- necting a thin-film diode device 20in a micro-circuit is illustrated. It will be understood that themicro-circuit is disposed on a non-conductive substrate 12 which may beof glass, for example. For a more complete description of the thin filmdiode device 20 reference is made to my co-pending application entitledThin Film Diode, S. N. 254,209, filed Ianuary 28, 1963, now Patent No.3,304,- 471 likewise assigned to the present assignee. Briefly thisdevice comprises a thin film 16 of semi-insulator material such ascadmium sulfide disposed between a pair of metal electrodes one of whichhas a work function higher than the work function of the semi-insulatorand the other of which has a work function lower than the work functionof the semi-insulator. In a typical embodiment of such a device one ofthe electrodes may be formed of gold, for example, and the other ofaluminum, for example.

Such a micro-circuit element and transmission line may be constructedaccording to the invention by first vapor depositing through a suitablemask two discrete metal layers 14 and 14' on the surface of thesubstrate 12. The metal layer 14 serves as the electrode layer of thethinfilm diode device 20 while the metal layer 14 serves as the firstground plane of the thin-film transmission line 22. For this purpose ofsuitable metal may he aluminum, for example. Thereafter portions of thesurface of the substrate may be masked so as to provide an openingtherethrough corresponding to the shape and size of hot the thin-filmdiode device 20 and the thin-film transmission line 22. Cadmium sulfidemay then be vapor deposited through this opening to form a cadmiumsulfide film 16 on portions of the metal layer 14 as well as a cadmiumsulfide layer 8 on the metal layer 14'. The cadmium sulfide also fillsin the space on the surface of the substrate 12 between the metal layers14 and 14' to effectively isolate these layers electrically from eachother. Again, by suitable masking, a layer of metal which may be gold isdeposited over the cadmium sulfide layers 8 and 16 to serve as thecenter-strip conductor 6 of the transmission line 22 and as the secondelectrode 18 of the thin-film diode device 20, respectively. Since theelectrode 18 of the diode device 20 and the center-strip conductor 6 arecontinuous and integral, the attainment of a good electrical connectiontherebetween is assured.

After the electrode 18 and the center-strip 6 have been formed, theactive thin-film device 20 and other prede- I termined portions of themicro-circuit may be suitably masked so as to leave the center-strip 6exposed to permit the deposition of a further layer 8 of cadmium sulfidethereover as described previously. The final step is the fabrication ofthe upper ground plane 2 which may be achieved by vapor deposition ofaluminum, for example, likewise as described previously. It will beunderstood that the other end of the transmission line may be connectedin similar fashion to other components or devices as desired.

In FIGURE 4 another arrangement of a transmission line is shownaccording to the present invention which achieves isolation of thecenter-strip conductor 6 from the semi-insulator material 8 by meansother than a rectifying barrier or junction. This arrangement permitsone to utilize metals for the center-strip conductor 6 which might,except for the novel arrangement shown in FIG- URE 4, inject chargecarriers into the semi-insulator material. According to this embodimentthe center-strip conductor 6 is electrically isolated from thesemi-insulator material by a coating or envelope 23 of a nonconductivematerial which has high electrical resistivity. A typical material maybe silicon oxide, for example.

The transmission line of FIGURE 4 may be fabricated by first forming aground-plane 4 of gold, for example, by techniques described previously;Next, a layer of cadmium sulfide may be deposited over the ground-plane4. After suitable masking to leave exposed a center-strip portion of thecadmium sulfide, a layer 23 of silicon oxide is deposited thereon afterwhich the center conductor 6:

semi-insulator material 8 by means of the oxide envelope 23.

Referring now to FIGURES 5(a) and 5(b) a thin-film active semiconductordevice is shown which may be fabricated by the deposition and diffusiontechniques de-.

scribed heretofore. This device comprises a grid 30 of N-type material,for example, which is formed in a body 32 of P-type silicon by the oxidemasking and diffusing techniques already described. The N-type grid maybe formed by diffusing arsenic through a mask into a boron dopedsemiconductor body 30. Thereafter the non-con ductive mask material isremoved as by etching with hydrofluoric acid in the case where a siliconoxide mask is employed. Next an additional P-type layer 32', is formedover the grid 30 and the exposed surface of the initial P-type siliconbody 32 by epitaxially depositing P-type silicon as described.

The complete device is shown in FIGURE 5 (b) and includes an uppermetallic electrode 34 comprising a layer of aluminum and a lowermetallic electrode 36 comprising also a layer of aluminum. In thisdevice the current flowing from the electrode layer 36 to the elec- Itrode layer 34 through the P-type silicon material 32 i and 32 may becontrolled by impressing any desired signal on the N-type grid 30. Theappropriate signal on the grid 30 will establish an electric fieldaround the grid in the P-type portion so as to effectively suppress orclose off the flow of majority charge carriers through the intersticesof the grid from one electrode to the other.

The device of FIGURES 5(a) and 5 (b) may also be provided in the reversepolarity; that is, the grid 30 may be composed of P-type material andthe semi-insulator body of N-type material. It is also feasible toreplace the metallic top and bottom layers 34 and 36 with heavilydopedor N+ diffused or alloyed layers where the semiinsulator body is ofN-type conductivity or with heavilydoped or P+ diffused or alloyedlayers where the semi-insulator body is of P-type conductivity. Thedesignations N and P+ are intended to indicate degenerate or nearlydegenerate doping.

FIGURE 6 shows a typical biasing arrangement for the N+ (NPN) Nthin-film field effect triode of FIG- URES 5(a) and 5(b). The inputimpedance of this device is very high since a reverse biased P-Njunction is present and can be in the range of 10 -10 ohms. By thearrangement shown in FIGURE 6 an incoming A.C. signal of voltage, V maybe amplified by the thin-film device and taken out at the drain terminal34 according to the expression out s m b where g is thetransconductance, and R is the load resistance in the circuit. As longas R is smaller than the drain differential resistance,

dV RD dID voltage, V the current flowing from the source 36 to the drain34 will be almost completely depressed and can take on negligiblevalues. Thus the device can be used successfully as a switching element.Referring to FIGURE 7, when no gate voltage is applied the device is inits conducting state at point A which corresponds to its high current,low voltage state. By applying suflicient negative gate voltage, thedevice will switch to point B along the loadline R point B correspondsto the low current, high voltage state (or off-state) of the device.

The active device will be able to perform well as a high frequency andhigh poweramplifier. High frequency operation is achieved by reason ofthe close spacing of the drain to the source, so that the transit timeof the majority carriers,

becomes very small and therefrom the frequency response, which isinversely proportional to 2 becomes very high (f-1/t). Thus, when d ll=100 cmF/V and V=V, t will equal 4 10 sec. which provides a frequencyresponse in the microwave region. High power operation is possiblebecause of the good heat sink which is the adjacent material around thedevice and will conduct the heat away from the active region.

What is claimed is:

1. Integrated electrical apparatus comprising:

(a) an electrically insulating support member;

(b) a high frequency electrical transmission line disposed on saidsupport member and formed of a body of semi-insulator material disposedbetween a pair of electrical conductive members and having an innerelectrical conductive member disposed within and surrounded by a barrierlayer formed between said inner member and said semi-insulator material;

(c) and a solid-state active electronic device comprising a body ofsemi-insulator material formed integrally with said first-named body ofsemi-insulator material and having at least one electrode member incontact with said second-named body of semiinsulator material and formedintegrally with said inner one of said electrically conductive membersof said high frequency transmission line whereby said active device iselectrically connected to said transmission line.

2. The apparatus according to claim 1 wherein said electrode member isformed integrally with said inner electrically conductive member of saidhigh frequency transmission line.

3. Integrated electrical apparatus comprising:

(a) an electrically insulating support member;

(b) a high frequency electrical transmission line disposed on saidsupport member and formed of a body of semi-insulator material disposedbetween a pair of electrically conductive members and having an innerelectrically conductive member disposed within and surrounded by abarrier layer formed bet-ween said inner member and said semi-insulatormaterial;

(c) and a solid-state active electronic device comprising a body ofsemi-insulator material disposed on said support member formedintegrally with said first-named body of semi-insulator material andhaving at least one electrode member in contact with said second-namedbody of semi-insulator material formed integrally with one of saidelectrically conductive members of said high frequency transmission linewhereby said active device is electrically connected to saidtransmission line.

4. The apparatus according to claim 3 wherein said electrode member isformed integrally with said inner electrically conductive member of saidhigh frequency transmission line.

5. The apparatus according to claim 3 wherein said semi-insulatormaterial comprising the bodies of said high frequency transmission lineand said active device and said one electrode member thereof arevapor-deposited layers.

6. Integrated electrical apparatus comprising:

(a) an electrically insulating support member;

(b) a high frequency electrical transmission line disposed on saidsupport member and formed of a body of semi-insulator material disposedbetween a pair of electrically conductive members and having an innerelectrically conductive member disposed within and surrounded by abarrier layer formed between said inner member and said semi-insulatormaterial;

(c) and a solid-state diode device comprising a first electrode memberdisposed on said support member, a body of semi-insulator materialdisposed on said first electrode member and formed integrally with saidfirst-named body of semi-insulator material, and a second electrodemember disposed on said secondnamed body of semi-insulator material andformed integrally with one of said electrically conductive members ofsaid high frequency transmission line whereby said diode device iselectrically connected to said transmission line.

7. The apparatus according to claim 6 wherein said second electrodemember is formed integrally with said inner electrically conductivemember of said high frequency transmission line.

References Cited UNITED STATES PATENTS 3,133,207 5/1964 Ayer 30788.53,155,881 11/1964 St. Jean 317-101 3,191,055 6/1965 Swihart et al.30788.5

JAMES D. KALLAM, Primary Examiner.

1. INTEGRATED ELECTRICAL APPARATUS COMPRISING: (A) AN ELECTRICALLYINSULATING SUPPORT MEMBER; (B) A HIGH FREQUENCY ELECTRICAL TRANSMISSIONLINE DISPOSED ON SAID SUPPORT MEMBER AND FORMED OF A BODY OFSEMI-CONDUCTOR MATERIAL DISPOSED BETWEEN A PAIR OF ELECTRICAL CONDUCTIVEMEMBERS AND HAVING AN INNER ELECTRICAL CONDUCTIVE MEMBER DISPOSED WITHINAND SURROUNDED BY A BARRIER LAYER FORMED BETWEEN SAID INNER MEMBER ANDSAID SEMI-INSULATOR MATERIAL; (C) AND A SOLID-STATE ACTIVE ELECTRONICDEVICE COMPRISING A BODY OF SEMI-INSULATOR MATEIRAL FORMED INTEGRALLYWITH SAID FIRST-NAMED BODY OF SEMI-INSULATOR MATERIAL AND HAVING ATLEAST ONE ELECTRODE MEMBER IN CONTACT WITH SAID SECOND-NAMED BODY OFSEMIINSULATOR MATERIAL AND FORMED INTEGRALLY WITH SAID INNER ONE OF SAIDELECTRIALLY CONDUCTIVE MEMBERS OF SAID HIGH FREQUENCY TRANSMISSION LINEWHEREBY SAID ACTIVE DEVICE IS ELECTRICALLY CONNECTED TO SAIDTRANSMISSION LINE.